Hitless Updates

Background Update and Reconfigure with Zero Downtime

Transparent Background Programming – Update MachXO3LF configuration Flash memory with zero downtime and no interruption to the active configuration.

Hitless I/O During Reconfiguration – New program refresh without power cycling and glitches to the active configuration.

Reliability with Dual Boot Support – Automatic recovery to golden failsafe image protects system during reprogramming.

Features

  • Background program over SPI, I2C or JTAG
  • Freeze I/O during reconfiguration
  • Start state machines from defined state based on Frozen I/O
  • Dual boot from golden image in external SPI Flash
  • In-field update with high reliability and zero downtime

Block Diagram

Design Resources for Hitless Updates

Programmable Logic Development Kits & Boards
  Provider MachXO3
MachXO3LF Starter Kit Lattice

Documentation

Quick Reference
TITLE NUMBER VERSION DATE FORMAT SIZE
MachXO3 Programming and Configuration Usage Guide
TN1279 2.2 9/7/2017 PDF 5.4 MB
Minimizing System Interruption During Configuration Using TransFR Technology
TN1087 3.7 10/30/2015 PDF 2.4 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
MachXO3 Programming and Configuration Usage Guide
TN1279 2.2 9/7/2017 PDF 5.4 MB
Minimizing System Interruption During Configuration Using TransFR Technology
TN1087 3.7 10/30/2015 PDF 2.4 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Hitless Update Demo User Guide
UG118 1.0 6/16/2016 PDF 1.9 MB
MachXO3 Starter Kit User’s Guide
EB95 1.2 3/14/2016 PDF 2.8 MB


Support

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Quality & Reliability

Reference Material to Help Answer Your Questions

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